Profile
Major is electrical engineering in National Kaohsiung University of Science and Technology.
An individual with a solid educational background with electrical engineer since senior high school.
Our laboratory be good at image processing , Verilog and FPGA
Education
| Period | College | Degree |
|---|---|---|
| Sep 2018 – | National Kaohsiung University of Science and Technology, Kaohsiung, Taiwan | Master of Electronic Engineering |
| Sep 2014 – Jun 2018 | National Kaohsiung University of Science and Technology, Kaohsiung, Taiwan | Bachelor of Electronic Engineering |
| Sep 2011 – Jun 2014 | Kaohsiung Municipal Kaohsiung Industrial High School, Kaohsiung, Taiwan | Electronics Department |
Digital IC Design
| Item | Tools |
|---|---|
| Languages | Verilog, SystemVerilog |
| Simulation | NC Verilog, ModelSim ,Quartus |
| Synthesis | Design Compiler |
| APR | Innovus |
Languages
| Type | Proficiency |
|---|---|
| Chinese(tradition) | Mother tongue |
| Taiwanese | Mother tongue |
| English | Basic |
| German | Ten credits |
Others
| Item | Project |
|---|---|
| College graduation monograph | Driverless bus |
| High school graduation monograph | RFID Lock |
| C++ Project | Library management |
| Android Studio Project | Ordering system |